On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation

Author

Deniz, Zeynep Toprak ; Leblebici, Yusuf ; Vittoz, Eric A.

Author_Institution

Ecole Polytechnique Federale de Lausanne, Lausanne

Volume

42

Issue

7

fYear

2007

fDate

7/1/2007 12:00:00 AM

Firstpage

1593

Lastpage

1606

Abstract

This work presents the design and the silicon implementation of an on-line energy optimizer unit based on novel analog computation approaches, which is capable of dynamically adjusting power supply voltages and operating frequencies of multiple processing elements on-chip. The optimized voltage/frequency assignments are tailored to the instantaneous workload information on multiple tasks and fully adaptive to variations in process and temperature. The optimizer unit has a response time of less than 50 mus, occupies a silicon area of 0.021 mm²/task and dissipates 2 mW/task.

Keywords

elemental semiconductors; network-on-chip; power supply circuits; silicon; NoC; Si - Interface; SoC; analog computation principles; dynamic voltage; frequency scaling; multi-core system-on-chip; multi-core systems; network-on-chip; on-line global energy optimization; power supply voltages; Analog computers; Decoding; Dynamic voltage scaling; Energy management; Frequency; Network-on-a-chip; Pervasive computing; Silicon; System-on-a-chip; Voltage control; Analog computation; System-on-Chip; dynamic voltage and frequency scaling; energy management; on-line energy optimization; pseudo-resistors; translinear loops; weak inversion;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2007.896694

Filename

4261002