DocumentCode
1039498
Title
Impact of twin-gate concept on silicon-on-insulator inverters
Author
Simoen, Eddy ; Claeys, Cor
Author_Institution
IMEC, Leuven
Volume
30
Issue
5
fYear
1994
fDate
3/3/1994 12:00:00 AM
Firstpage
454
Lastpage
456
Abstract
The low-temperature DC transfer characteristics of inverters, fabricated in a 1 μm silicon-on-insulator (SOI) CMOS technology, are investigated. As will be shown, the operation parameters, such as the noise margin, are degraded by the floating body effects, typical for a partially depleted technology and by low-temperature artefacts. However, by using the so-called twin-gate concept, considerable improvement in the inverter performance can be obtained, both at room temperature and at 4.2 K
Keywords
CMOS integrated circuits; SIMOX; elemental semiconductors; insulated gate field effect transistors; logic gates; semiconductor device noise; silicon; 1 micron; 300 K; 4.2 K; CMOS technology; SIMOX substrate; Si-SiO2; floating body effects; low-temperature DC transfer characteristics; low-temperature artefacts; noise margin; operation parameters; partially depleted technology; room temperature; silicon-on-insulator inverters; twin-gate concept;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19940303
Filename
273235
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