• DocumentCode
    1039624
  • Title

    Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References

  • Author

    Özalevli, Erhan ; Lo, Haw-Jing ; Hasler, Paul E.

  • Author_Institution
    Georgia Inst. of Technol., Atlanta, GA
  • Volume
    55
  • Issue
    4
  • fYear
    2008
  • fDate
    5/1/2008 12:00:00 AM
  • Firstpage
    990
  • Lastpage
    998
  • Abstract
    An implementation of a compact and programmable 10-bits floating-gate digital-to-analog converter (FGDAC) is described. In this implementation, nonvolatile floating-gate voltage references (epots) are employed together with unity-size capacitors to obtain the binary-weighted scale factors. The FGDAC, fabricated in a 0.5- mum CMOS process, occupies 0.208 mm2 of die area. The stored epot voltages drift 10_3% over the period of ten years at 25 degC and exhibit temperature coefficients of less than 37 ppm/degC. With the proposed design, INL and DNL values less than plusmn0.5LSB (LSB = 3 mV) and SFDR around 63 dB are obtained.
  • Keywords
    CMOS integrated circuits; digital-analogue conversion; CMOS process; FGDAC; binary-weighted digital-to-analog converter design; binary-weighted scale factors; floating-gate voltage references; unity-size capacitors; Binary weighted; DAC; Floating-gate transistor; binary-weighted; digital-to-analog converter (DAC); epot; floating gate (FG); programmable; transistor; trimming;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2008.916451
  • Filename
    4433427