DocumentCode :
1039665
Title :
CMOS Distributed Active Power Combiners and Splitters for Multi-Antenna UWB Beamforming Transceivers
Author :
Safarian, Aminghasem ; Zhou, Lei ; Heydari, Payam
Author_Institution :
Broadcom Corp., Irvine
Volume :
42
Issue :
7
fYear :
2007
fDate :
7/1/2007 12:00:00 AM
Firstpage :
1481
Lastpage :
1491
Abstract :
This paper presents the design of the first CMOS distributed active power combiners and splitters with wideband variable delay and gain. These circuits are the key components for use in multi-antenna (MA) ultra-wideband (UWB) point-to-point beamforming communication systems with multiple transmit and receive antennas. Two broadband circuit topologies for each active power combiner and splitter are proposed, one of which being fabricated in a 0.13-mum CMOS process. The proposed fabricated distributed active power combiner and splitter operate across wide range of frequencies that cover the UWB frequency range from 3.1 to 10.6 GHz. The gain of each RF path of the power combiner and splitter is independently controllable from -15 to 6 dB and from -16 to 9.5 dB, respectively. The wideband variable delay of each RF path varies from 32 to 42 ps for the two-stage power combiner, and from 43 to 53 ps for the three-stage power splitter across the UWB frequency range. Supplied from 1.8-V DC voltage, the power combiner and splitter consume 8.5 mA and 11.4 mA, respectively.
Keywords :
CMOS integrated circuits; millimetre wave antenna arrays; multibeam antennas; power combiners; power dividers; transceivers; ultra wideband antennas; ultra wideband communication; CMOS distributed active power combiners; CMOS distributed active power splitters; CMOS process; broadband circuit topologies; current 11.4 mA; current 8.5 mA; frequency 3.1 GHz to 10.6 GHz; multiantenna UWB beamforming transceivers; multiantenna ultra-wideband communication systems; point-to-point beamforming communication systems; receive antennas; size 0.13 mum; time 32 ps to 42 ps; time 43 ps to 53 ps; transmit antennas; voltage 1.8 V; wideband variable delay; Array signal processing; CMOS process; Circuit topology; Delay; Gain; Power combiners; Radio frequency; Receiving antennas; Transceivers; Ultra wideband technology; Active power combiner; active power splitter; broadband delay; distributed circuit; multi-antenna (MA) transceiver; ultra-wideband (UWB);
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2007.899121
Filename :
4261019
Link To Document :
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