• DocumentCode
    104010
  • Title

    High-Voltage LDMOS Transistor With Split-Gate Structure for Improved Electrical Performance

  • Author

    Kee-Yeol Na ; Ki-Ju Baek ; Gun-Woong Lee ; Yeong-Seuk Kim

  • Author_Institution
    Chungbuk Provincial Coll., Ok-Cheon Goon, South Korea
  • Volume
    60
  • Issue
    10
  • fYear
    2013
  • fDate
    Oct. 2013
  • Firstpage
    3515
  • Lastpage
    3520
  • Abstract
    An n-channel split-gate laterally double-diffused metal-oxide-semiconductor (LDMOS) device is presented. The proposed split-gate LDMOS has a primary gate (PG) and floating gate (FG). The FG is formed by spacer etching and placed along the perimeter of the PG. The potential of the FG is determined by the potential of the PG and the capacitive coupling ratio. Therefore, the FG has lower potential than that of the PG. This potential difference along the channel length direction accelerates channel carriers, which ultimately enhances device performances. From device measurements, the fabricated splitgate LDMOS devices showed improved electrical characteristics: lower drain-induced barrier lowering; higher transconductance (gm); lower drain conductance (gds = 1/rout); lower ON-resistances RON; and higher early voltage VEA = ID/gds.
  • Keywords
    MOSFET; coupled circuits; etching; semiconductor device measurement; FG; PG; capacitive coupling ratio; channel carrier acceleration; channel length direction acceleration; floating gate; high-voltage LDMOS transistor; improved electrical performance; lower drain-induced barrier lowering; n-channel split-gate laterally double-diffused metal-oxide-semiconductor device; primary gate; spacer etching; split-gate LDMOS structure; Current measurement; Electric potential; Junctions; Logic gates; Performance evaluation; Split gate flash memory cells; Voltage measurement; Capacitive coupling ratio $(alpha)$; channel length modulation (CLM); drain conductance $(g_{{rm ds}})$; drain-induced barrier lowering (DIBL); early voltage $(V_{{rm E}A})$; high-voltage (HV) device; laterally double-diffused metal-oxide-semiconductor (LDMOS); split-gate transistor; transconductance $(g_{m})$;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2013.2278974
  • Filename
    6587782