Reliability effects of X-ray lithography exposures on submicron-channel MOSFETs

Submicron-channel-length n- and p-channel MOSFETs subjected to channel hot-carrier stressing were investigated. The reliability of devices with and without exposure to simulated X-ray lithography processing steps was compared. No significant differences were observed between the sample groups. As expected, the increase in ΔV_TH correlated with a decrease in the drawn channel length. Even at the shortest channel lengths, however, the shifts are quite small under more realistic bias conditions (smaller drain biases under DC and AC stressing)