• DocumentCode
    1042755
  • Title

    A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations

  • Author

    Hilewitz, Yedidya ; Lee, Ruby B.

  • Author_Institution
    Massachusetts Microprocessor Design Center, Intel Corp., Hudson, MA, USA
  • Volume
    58
  • Issue
    8
  • fYear
    2009
  • Firstpage
    1035
  • Lastpage
    1048
  • Abstract
    This paper describes a new basis for the implementation of the shifter functional unit in microprocessors that can implement new advanced bit manipulations as well as standard shifter operations. Our design is based on the inverse butterfly and butterfly data path circuits, rather than the barrel shifter or log-shifter designs currently used. We show how this new shifter can implement the standard shift and rotate operations, as well as more advanced extract, deposit, and mix operations found in some processors. Furthermore, it can perform important new classes of even more advanced bit manipulation instructions like arbitrary bit permutations, bit gather (or parallel extract), and bit scatter (or parallel deposit) instructions. Thus, our new functional unit performs the functionality of three functional units-the basic shifter, the multimedia-mix unit, and the advanced bit manipulation functional unit, while having a latency only slightly longer than that of the log-shifter. For performing only the existing functions of a shifter, it has significantly smaller area.
  • Keywords
    instruction sets; logic design; microprocessor chips; advanced bit manipulation instruction; barrel shifter design; butterfly data path circuit; general-purpose processor; instruction set architecture; inverse butterfly circuit; log-shifter design; microprocessor; multimedia-mix unit; shifter functional unit; Arithmetic; Bioinformatics; Circuit synthesis; Cryptography; Data mining; Delay; Digital arithmetic; Instruction sets; Logic programming; Microprocessors; Scattering; Shifter; arithmetic; bit gather; bit manipulation; bit scatter; butterfly; circuit design; deposit; extract; instruction set architecture; inverse butterfly; microprocessor; mix; multimedia; parallel operations.; permutation; processor architecture; rotation; shift;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2008.219
  • Filename
    4721365