DocumentCode
1043159
Title
A Differential Architecture for an Online Analog Viterbi Decoder
Author
Maunu, Janne ; Laiho, Mika ; Paasio, Ari
Volume
55
Issue
4
fYear
2008
fDate
5/1/2008 12:00:00 AM
Firstpage
1133
Lastpage
1140
Abstract
A differential architecture of an analog Viterbi decoder is presented. Analog processing enables the analog-digital converter to be excluded from the decoder realization. Moreover, high-speed operation can be achieved via differential processing. We describe the differential operation, together with the resulting decoder structure. The differential architecture enables the trace-back memory to be excluded and makes online decoding after initial transitional stages possible. We analyze the performance of the differential analog decoder by including analog circuit nonidealities in the system-level model. The decoder obeys a nonlinear transfer function, and the monotonical growth of path metrics is avoided by scaling and subtraction of the global minimum. The resulting differential analog decoder performance is compared with the performance of a 3-bit soft-decision digital Viterbi decoder. The simulations are performed for a (2,1,7) convolutional code.
Keywords
Viterbi decoding; analogue-digital conversion; convolutional codes; signal processing; transfer functions; analog processing; analog-digital converter; convolutional code; differential architecture; nonlinear transfer function; online analog Viterbi decoder; trace-back memory; Analog systems; Differential geometry; Forward error correction; Viterbi decoding; differential geometry; forward error correction (FEC); parallel architectures;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2008.916546
Filename
4436042
Link To Document