Title :
A test circuit for measurement of clocked storage element characteristics
Author :
Nedovic, Nikola ; Walker, William W. ; Oklobdzija, Vojin G.
Author_Institution :
Fujitsu Labs. of America, Sunnyvale, CA, USA
Abstract :
We present a method, on-chip test circuitry, and an error analysis, for accurate measurement of timing characteristics and power consumption of clocked storage elements. The test circuit was fabricated in 0.11 μm CMOS technology and the measurements performed automatically using a serial scan interface. The precision and accuracy of the presented method are demonstrated by the ability to measure entire clock-to-output characteristics of flip-flops. Estimated data-to-output delay systematic measurement error is 6 ps (7%), and random error is 10 ps (11%). The method and the test circuit are applicable for delay measurements of other circuit blocks as well.
Keywords :
CMOS logic circuits; built-in self test; flip-flops; integrated circuit design; integrated circuit measurement; integrated circuit testing; logic design; logic testing; 0.11 micron; CMOS; clock-to-output characteristics; clocked storage elements; data-to-output delay; error analysis; flip-flops; measurement circuit; on-chip measurement; on-chip test circuitry; power consumption; random error; serial scan interface; systematic measurement error; test circuit; timing characteristics; Automatic testing; CMOS technology; Circuit testing; Clocks; Delay estimation; Energy consumption; Error analysis; Performance evaluation; Power measurement; Timing; Clocked storage elements; delay; measurement circuit; measurement error; on-chip measurement; power consumption;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.831498
