DocumentCode :
1044073
Title :
Design considerations of step recovery diodes with the aid of numerical large-signal analysis
Author :
Kurata, Mamoru
Author_Institution :
Toshiba Electric Company, Ltd., Kawasaki, Japan
Volume :
19
Issue :
11
fYear :
1972
fDate :
11/1/1972 12:00:00 AM
Firstpage :
1207
Lastpage :
1215
Abstract :
Switching behavior of the step recovery diode (SRD) is studied through exact large-signal analysis. Two numerical methods are presented. One is suitable for steady-state and slow-transient calculations, while the other is based on a principle given by Scharfetter and Gummel, being appropriate for fast-transient calculation. Criteria for each method are described in terms of space and time intervals. A variety of doping profiles is generated by seven parameters, to determine the influence of each parameter on switching response. The normally defined transition time for current falloff from 90 to 10 percent consists of a physical transition phase and the phase of the CR time constant, which is defined as the product of junction capacitance and series resistance. The former is minimized by a narrow region of light doping, or by an abrupt profile, whereas the latter is minimized by a wide region of light doping, thus making a compromise necessary. Under the assumption of improved device fabrication technology, operation with low external impedance will allow total transition time to decrease to about one-half or one-third of today´s standard sample. As was pointed out by Moll et al., a small amount of series inductance is desirable for fast transition.
Keywords :
Capacitance; Charge carrier processes; Chromium; Current density; Doping profiles; Electrostatics; Fabrication; P-i-n diodes; Steady-state; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1972.17575
Filename :
1477046
Link To Document :
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