A Heterogeneous 16-Bit DAC Using a Replica Compensation

Author

Seo, Dongwon

Author_Institution

Qualcomm Inc., San Diego, CA

Volume

55

Issue

6

fYear

2008

fDate

7/1/2008 12:00:00 AM

Firstpage

1455

Lastpage

1463

Abstract

A highly monotonic very low power 16-bit 2-MS/s digital-to-analog converter (DAC) for high-resolution control loop systems is proposed and demonstrated. Replica compensation is used in improving the monotonicity of a heterogeneous DAC composed of a coarse current steering DAC and a fine resistor-ladder DAC. A complete DAC, including an on-chip bandgap reference and an output buffer, consumes only 0.6 mA with a 2.7-V supply. The 2.19-mm² DAC with 10-I/O bonding pads implemented in 0.18-mum Bi-CMOS process achieves plusmn0.8 least significant bit (LSB) differential nonlinearity, plusmn4 LSB integral nonlinearity, and plusmn3-mV offset error at 2-MS/s sample rate.

Keywords

BiCMOS integrated circuits; compensation; digital-analogue conversion; reference circuits; BiCMOS process; current 0.6 mA; current steering; digital-to-analog converter; heterogeneous DAC; high-resolution control loop systems; on-chip bandgap reference; output buffer; replica compensation; resistor-ladder DAC; size 0.18 mum; voltage 2.7 V; word length 16 bit; 16-bit monotonicity; DAC; Digital to analog converter; current steering DAC; current steering digital-to-analog converter (DAC); current/voltage switching scheme; replica compensation; resistor-ladder DAC;

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2008.916625

Filename

4437483