Title :
Simulation and Experimental Demonstration of Logic Circuits Using an Ultra-Low-Power Adiabatic Quantum-Flux-Parametron
Author :
Inoue, Ken ; Takeuchi, N. ; Ehara, K. ; Yamanashi, Y. ; Yoshikawa, N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Yokohama Nat. Univ., Yokohama, Japan
Abstract :
We have been investigating an ultra-low-power adiabatic quantum-flux-parametron (AQFP) logic, the energy dissipation of which can be decreased by changing its potential energy slowly or adiabatically. In the present study, we designed basic AQFP logic gates and an AQFP 1-bit full adder, and examined their operations through simulations and experiments. The AQFP 1-bit full adder is composed of 46 Josephson junctions, which is approximately one-quarter the number of junctions of a full adder using conventional rapid single-flux-quantum logic. The measurement results indicated that the AQFP 1-bit full adder has a wide current bias margin of as large as ±27.8%.
Keywords :
adders; logic circuits; logic gates; low-power electronics; AQFP 1-bit full adder; AQFP logic gates; Josephson junctions; energy dissipation; potential energy; single flux quantum logic; ultra low power adiabatic quantum flux parametron logic circuits; Adders; Current measurement; Electronics packaging; Energy dissipation; Integrated circuits; Logic gates; Simulation; Adiabatic circuits; QFP; energy efficient; full adder; low power; primitive gate; superconducting devices;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
DOI :
10.1109/TASC.2012.2236133
