• DocumentCode
    1046140
  • Title

    High-throughput, reduced hardware systolic solution to prime factor discrete Fourier transform algorithm

  • Author

    Jones, K.J.

  • Author_Institution
    Plessey Avionics Ltd., Havant, UK
  • Volume
    137
  • Issue
    3
  • fYear
    1990
  • fDate
    5/1/1990 12:00:00 AM
  • Firstpage
    191
  • Lastpage
    196
  • Abstract
    The paper discusses a novel systolic implementation of the row-column method for solving the prime factor discrete Fourier transform (DFT) algorithm. It deals, in particular, with the two-factor decomposition where the transform length N is an odd multiple of 4. By processing the four-point row-DFTs coefficient by coefficient, rather than DFT by DFT, as is conventionally done, it is seen how pipelined implementations of the row-DFT and column-DFT processes can be performed simultaneously, without need for matrix transposition of the row-DFT output, resulting in a fully pipelined concurrent solution. Hardware efficiency and simplicity is achieved via the computationally attractive Cordic (co-ordinate digital computer) arithmetic, with O(N) throughput requiring (asymptotically) one-quarter of the hardware requirements of established N-processor solutions.
  • Keywords
    fast Fourier transforms; mathematics computing; Cordic arithmetic; pipelined implementations; prime factor discrete Fourier transform algorithm; reduced hardware systolic solution; row-column method; two-factor decomposition;
  • fLanguage
    English
  • Journal_Title
    Computers and Digital Techniques, IEE Proceedings E
  • Publisher
    iet
  • ISSN
    0143-7062
  • Type

    jour

  • Filename
    50611