Title :
A Single Chip H.264/AVC HDTV Encoder/Decoder/Transcoder System LSI
Author :
Mizosoe, Hiroki ; Yoshida, Daisuke ; Nakamura, Taku
Author_Institution :
Ubiquitous Platform Syst. R&D Lab., Hitachi Ltd., Yokohama
fDate :
5/1/2007 12:00:00 AM
Abstract :
A new single chip HDTV H.264 codec system LSI was designed using flexible codec architecture. It supports HP@L4.1 with full 1920x1080 resolution. The LSI supports MPEG2 and JPEG as well. The chip integrates one encoder and two decoders, which work independently and can be used in flexible ways including transcoding. It also integrates almost all the necessary functions for digital consumer application including an audio codec, graphics and video circuitry, peripherals, and a generic microprocessor.
Keywords :
high definition television; large scale integration; video codecs; video coding; H.264 codec system; JPEG; LSI; MPEG2; audio codec; decoder system; decoders; digital consumer application; encoder system; flexible codec architecture; generic microprocessor; graphics; peripherals; single chip H.264/AVC HDTV; transcoder system; video circuitry; Automatic voltage control; Codecs; Decoding; Encoding; HDTV; Hardware; Large scale integration; Motion estimation; Pipelines; Transcoding;
Journal_Title :
Consumer Electronics, IEEE Transactions on
DOI :
10.1109/TCE.2007.381739
