An approach to efficient plated-wire memory cell design is described. Disturb mechanisms are not considered; instead, minimization of the drive requirement is the basic criterion. Various models of the magnetization distribution at the edges of a bit which is being driven are investigated, and it is shown that the hyperbolic tangent function is a good approximation to the real distribution. This result is used to determine the cell structure requiring minimum drive for a specified output flux and one which minimizes the drive current-cell area product for specified output. It is shown that current.cell area

where φ
sis the signal flux required, H
kthe anisotropy field of the material,

is the plated-wire diameter, and

the plated-wire pitch.