• DocumentCode
    1047973
  • Title

    A transformation-based method for loop folding

  • Author

    Lee, Tsing-Fa ; Wu, Allen C H ; Lin, Youn-Long ; Gajski, Daniel D.

  • Author_Institution
    Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • Volume
    13
  • Issue
    4
  • fYear
    1994
  • fDate
    4/1/1994 12:00:00 AM
  • Firstpage
    439
  • Lastpage
    450
  • Abstract
    We propose a transformation-based scheduling algorithm for the problem given a loop construct, a target initiation interval and a set of resource constraints, schedule the loop in a pipelined fashion such that the iteration time of executing an iteration of the loop is minimized. The iteration time is an important quality measure of a data path design because it affects both storage and control costs. Our algorithm first performs an As Soon As Possible Pipelined (ASAPp) scheduling regardless the resource constraint. It then resolves resource constraint violations by rescheduling some operations. The software system implementing the proposed algorithm, called Theda.Fold, can deal with behavioral loop descriptions that contain chained, multicycle and/or structural pipelined operations as well as those having data dependencies across iteration boundaries. Experiment on a number of benchmarks is reported
  • Keywords
    VLSI; circuit CAD; graph theory; logic CAD; pipeline processing; scheduling; Theda.Fold; VLSI design; as soon as possible pipelined scheduling; behavioral loop descriptions; chained pipelined operations; data path design; high-level synthesis; iteration time; loop construct; loop folding; multicycle pipelined operations; resource constraints; scheduling algorithm; software system; structural pipelined operations; target initiation interval; transformation-based method; Clocks; Computer science; Costs; Hardware; Processor scheduling; Scheduling algorithm; Software algorithms; Software systems; Time measurement; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.275354
  • Filename
    275354