DocumentCode
1048692
Title
The effect of thermal treatment on device characteristic and reliability for sub-100-nm CMOSFETs
Author
Yeh, Wen-Kuan ; Fang, Yean-Kuen ; Chen, Mao-Chieh
Author_Institution
Electr. Eng. Dept., Nat. Univ. of Kaohsiung, Taiwan
Volume
4
Issue
2
fYear
2004
fDate
6/1/2004 12:00:00 AM
Firstpage
256
Lastpage
262
Abstract
The effect of post-thermal annealing after halo implantation on device characteristic and reliability of sub-100-nm CMOSFETs was investigated. We found that the control of annealing time is more efficient than that of annealing temperature with respect to improving the hot-carrier-induced degradation. The best result of device performance and reliability was obtained by a post-thermal annealing treatment performed at medium temperatures (e.g., 900°C) for a longer time (>1 min).
Keywords
CMOS integrated circuits; MOSFET; annealing; hot carriers; ion implantation; semiconductor device reliability; CMOSFET; annealing temperature; annealing time; device characteristic; device performance; device reliability; halo implantation; hot-carrier; indium; post-thermal annealing; thermal treatment effect; Annealing; CMOSFETs; Degradation; Doping; Hot carriers; Implants; Indium; Ion implantation; MOSFET circuits; Niobium compounds; Halo; hot-carrier-induced degradation; indium; post-thermal annealing;
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2004.826590
Filename
1318630
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