DocumentCode
1048756
Title
A self-contained magnetic bubble-domain memory chip
Author
Chang, Hsu ; Fox, J. ; Lu, D. ; Rosier, Laurence L.
Author_Institution
IBM Corporation-SDD, San Jose, Calif
Volume
8
Issue
2
fYear
1972
fDate
6/1/1972 12:00:00 AM
Firstpage
214
Lastpage
222
Abstract
All the functions essential for the operation of a memory (viz., storage, access, write, read, and detection) can be performed within a bubble-domain memory chip. This enables the design of a memory with a minimum number of peripheral circuits and interconnections, and a short access time. It is conceivable to achieve a 106-bit memory with fewer than 20 circuits (and interconnections), and with a few hundreds of microseconds access time. The present paper describes the devices required to implement such a memory, experimental data to demonstrate the operability of such devices, and the design criteria.
Keywords
Magnetic bubble logic circuits; Magnetic bubble memories; Conductors; Decoding; Delay; Detectors; Integrated circuit interconnections; Joining processes; Magnetic domains; Magnetic semiconductors; Semiconductor memory; Shift registers;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/TMAG.1972.1067285
Filename
1067285
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