DocumentCode
1050401
Title
A new heterojunction gate GaAs FET
Author
Umebachi, S. ; Asahi, K. ; Inoue, M. ; Kano, G.
Author_Institution
Matsushita Electronics Corporation, Takatsuki, Osaka, Japan
Volume
22
Issue
8
fYear
1975
fDate
8/1/1975 12:00:00 AM
Firstpage
613
Lastpage
614
Abstract
A new type of GaAs JFET having a heterojunction gate is proposed. The structure involves epitaxially grown layers of n-GaAs for the channel and of p-GaAlAs for the gate which can be easily delineated by the self-alignment technology using an overgrown p-GaAs. The potential advantages of the heterojunction structure for GaAs FET´s over the conventional Schottky barrier are in the fewer masks for fabrication and the short channels expected. Some preliminary experimental results on fabrication technologies and dc characteristics of the new devices are described.
Keywords
Etching; FETs; Fabrication; Gallium arsenide; Heterojunctions; Nonhomogeneous media; Positron emission tomography; Schottky barriers; Substrates; Zinc;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1975.18186
Filename
1478021
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