DocumentCode :
1050438
Title :
A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process
Author :
Palaskas, Yorgos ; Taylor, Stewart S. ; Pellerano, Stefano ; Rippke, Ian ; Bishop, Ralph ; Ravi, Ashoke ; Lakdawala, Hasnain ; Soumyanath, K.
Author_Institution :
Intel Corp., Commun. Circuits Lab., Hillsboro, OR
Volume :
41
Issue :
8
fYear :
2006
Firstpage :
1757
Lastpage :
1763
Abstract :
This paper presents an integrated CMOS power amplifier and a technique for correcting AM-PM distortion in power amplifiers. The linearization technique uses a varactor as part of a tuned circuit to introduce a phase shift that counteracts the AM-PM distortion of the power amplifier. The varactor is controlled by the amplitude of the IQ baseband data in a feedforward fashion. The technique has been demonstrated in a 5-GHz class-AB CMOS power amplifier designed for WLAN applications and implemented in a 90-nm CMOS process. The power amplifier delivers 16 dBm of average power while transmitting at 54 Mb/s (64 QAM). The proposed linearization technique is shown to improve the efficiency of the power amplifier by a factor of 2.8
Keywords :
CMOS integrated circuits; MMIC power amplifiers; amplitude modulation; intermodulation distortion; linearisation techniques; phase shifters; pulse modulation; varactors; wireless LAN; 5 GHz; 54 Mbit/s; 90 nm; AM-PM correction; AM-PM distortion; CMOS power amplifier; CMOS process; IQ baseband data; WLAN applications; linearization technique; phase shift; Baseband; CMOS process; Feedback; Inductance; Linearization techniques; Power amplifiers; Predistortion; Varactors; Voltage-controlled oscillators; Wireless LAN; AM-PM distortion; linearization; power amplifier (PA);
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2006.877255
Filename :
1661752
Link To Document :
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