Isolation of Highly Doped Implants on Low-Doped Active Layers for CMOS Radiation Drift Detectors

A method to avoid punchthrough between highly doped implants, built on low-doped substrates or epitaxial layers, is proposed. The technique, which is similar to other previously used in scientific pixel detectors, is here applied in a VLSI CMOS standard technology, to design electrically isolated pixels for radiation or particle detection using the source/drain implants as collecting electrodes. The isolation principle is based on the use of surface-implant stops of the opposite type of conductivity with respect to the collecting electrodes, combined with shallow trench isolations. The pixels can be biased at different voltages, allowing the creation of particular electric-field configurations within the silicon bulk. Significant carrier drift components in the direction parallel to the semiconductor surface can thus be obtained. A 90-nm standard CMOS test structure with 950-nm-spaced pixels that can be reverse biased with 10 V of relative difference without significant degradation of the dark current demonstrates the feasibility.