• DocumentCode
    1051170
  • Title

    An 8-bit 20-MS/s ZCBC Time-Domain Analog-to-Digital Data Converter

  • Author

    Wang, I-Hsin ; Lee, Hwei-Yu ; Liu, Shen-Iuan

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    56
  • Issue
    7
  • fYear
    2009
  • fDate
    7/1/2009 12:00:00 AM
  • Firstpage
    545
  • Lastpage
    549
  • Abstract
    An 8-bit 20-MS/s time-domain analog-to-digital data converter (ADC) using the zero-crossing-based circuit technique is presented. Compared with the conventional ADCs, signal processing is executed in both the voltage and time domains. Since no high-gain operational amplifier is needed, this time-domain ADC works well in a low supply voltage. The proposed ADC has been fabricated in a 0.18-mum CMOS process. Its power dissipation is 4.64 mW from a supply voltage of 1.8 V. This active area occupies 1.2 times 0.7 mm2. The measured signal-to-noise-distortion ratio achieves 44.2 dB at an input frequency of 10 MHz. The integral nonlinearity is less than plusmn1.07 LSB, and the differential nonlinearity is less than plusmn0.72 LSB. This time-domain ADC achieves the effective bits of 7.1 for a Nyquist input frequency at 20 MS/s.
  • Keywords
    CMOS digital integrated circuits; analogue-digital conversion; operational amplifiers; signal processing; CMOS process; frequency 10 MHz; high-gain operational amplifier; power 4.64 mW; signal processing; size 0.18 mum; time domains; time-domain analog-to-digital data converter; voltage 1.8 V; voltage domains; zero-crossing-based circuit technique; Analog-to-digital converter (ADC); delay-locked loop (DLL); time domain; zero-crossing-based circuit (ZCBC);
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2009.2022208
  • Filename
    5061580