DocumentCode :
1051224
Title :
Implementation of the Cell Broadband Engine™ in 65 nm SOI Technology Featuring Dual Power Supply SRAM Arrays Supporting 6 GHz at 1.3 V
Author :
Pille, Juergen ; Adams, Chad ; Christensen, Todd ; Cottier, Scott R. ; Ehrenreich, Sebastian ; Kono, Fumihiro ; Nelson, Daniel ; Takahashi, Osamu ; Tokito, Shunsako ; Torreiter, Otto ; Wagner, Otto ; Wendel, Dieter
Author_Institution :
IBM Entwicklung GmbH, Boeblingen
Volume :
43
Issue :
1
fYear :
2008
Firstpage :
163
Lastpage :
171
Abstract :
The 65 nm cell broadband enginetrade (cell BE) is a multi-core SoC, implemented in a high performance SOI technology featuring a separate dual power supply for SRAM arrays to improve stability and performance using an elevated voltage. A new method is shown to analyze the SRAM cell under application conditions which was used to tune the cell for stability, write-ability and performance. An improved write scheme is shown which widens the overall functional window and allows setting the power/performance point of the arrays independently of the surrounding logic. Hardware measurements demonstrate the advantages of the dual power supply under different aspects.
Keywords :
SRAM chips; silicon-on-insulator; system-on-chip; SOI technology; cell broadband engine; cell circuits; cell processor; dual power supply SRAM arrays; frequency 6 GHz; size 65 nm; synergistic processor; voltage 1.3 V; Circuit stability; Clocks; Energy management; Logic arrays; Power supplies; Power system management; Random access memory; Stability analysis; Thermal management; Voltage; 65 nm SOI; Cell broadband engine; SoC; cell circuits; cell processor; modularity; multi-core; synergistic processor;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2007.907999
Filename :
4443205
Link To Document :
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