DocumentCode :
1051366
Title :
A Band-Limited Active Damping Circuit With 13 dB Power Supply Resonance Reduction
Author :
Xu, Jianping ; Hazucha, Peter ; Wu, Zuoguo ; Aseron, Paolo ; Huang, Mingwei ; Paillet, Fabrice ; Schrom, Gerhard ; Tschanz, James ; De, Vivek ; Karnik, Tanay ; Taylor, Greg
Author_Institution :
Intel Corp., Hillsboro
Volume :
43
Issue :
1
fYear :
2008
Firstpage :
61
Lastpage :
68
Abstract :
The impedance of a microprocessor power-delivery network peaks at ~140 MHz, resulting in power-grid resonance, which lowers operating frequency and compromises gate oxide integrity. A suppression circuit is designed using an active-damping technique with a maximum of 13 dB supply voltage noise reduction from 70 to 250 MHz in a 90 nm CMOS process.
Keywords :
CMOS integrated circuits; circuit resonance; integrated circuit interconnections; microprocessor chips; CMOS process; band-limited active damping circuit; frequency 70 MHz to 250 MHz; gate oxide integrity; microprocessor power-delivery network; noise figure 13 dB; noise reduction; power supply resonance reduction; size 90 nm; suppression circuit; CMOS process; Damping; Frequency; Impedance; Microprocessors; Noise reduction; Power supplies; RLC circuits; Resonance; Voltage; Band-limited active damping; CMOS circuit; power delivery network; power supply noise; supply noise reduction; supply resonance suppression;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2007.913155
Filename :
4443216
Link To Document :
بازگشت