• DocumentCode
    1051667
  • Title

    Characteristics of Gate-All-Around Twin Poly-Si Nanowire Thin-Film Transistors

  • Author

    Sheu, Jeng-Tzong ; Huang, Po-Chun ; Sheu, Tzu-Shiun ; Chen, Chen-Chia ; Chen, Lu-An

  • Author_Institution
    Inst. of Nanotechnol., Nat. Chiao Tung Univ., Hsinchu
  • Volume
    30
  • Issue
    2
  • fYear
    2009
  • Firstpage
    139
  • Lastpage
    141
  • Abstract
    We have investigated the characteristics of gate-all-around (GAA) twin polycrystalline-silicon nanowire (NW) thin-film transistors (TFTs). The NW channel and surrounding gate imparted the GAA twin NW TFT with superior channel controllability. Moreover, the combination of the high surface-to-volume ratio of the NW and the split channel structure led to highly efficient NH3 plasma treatment, which reduced the effective grain-boundary trap-state density. The GAA twin NW TFT exhibited greatly improved electrical performance, including a lower threshold voltage, a steeper subthreshold swing (114 mV/dec), a higher on/off current ratio (> 108), and a virtual absence of drain-induced barrier lowering (13 mV/V).
  • Keywords
    elemental semiconductors; nanoelectronics; nanowires; plasma applications; silicon; thin film transistors; twin boundaries; Si; electrical performance; gate-all-around twin poly-silicon transistor; grain-boundary trap-state density; highly efficient ammonia plasma treatment; nanowire thin-film transistor; polycrystalline-silicon nanowire TFT; short-channel effects; split channel structure; surface-to-volume ratio; Gate-all-around (GAA); nanowire (NW); plasma treatment; short-channel effects (SCEs); thin-film transistor (TFT);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2008.2009956
  • Filename
    4732143