DocumentCode :
1052009
Title :
Two-dimensional carrier flow in a transistor structure under nonisothermal conditions
Author :
Gaur, Santosh P. ; Navon, David H.
Author_Institution :
IBM, Poughkeepsie, NY
Volume :
23
Issue :
1
fYear :
1976
fDate :
1/1/1976 12:00:00 AM
Firstpage :
50
Lastpage :
57
Abstract :
A two-dimensional mathematical model is developed to predict the internal behavior of power transistors operating under steady-state conditions. This model includes the internal self-heating effects in power transistors and is applicable to predict the transistor behavior under high-current and high-voltage operating conditions. The complete set of partial differential equations governing the bipolar semiconductor device behavior under nonisothermal conditions is solved by numerical techniques without assuming internal junctions and other conventional approximations. Input parameters for this model are the dimension of the device, doping profile, mobility expressions, generation-recombination model, and the boundary conditions for external contacts. Computer results of the analysis of a typical power transistor design are presented for specified operating conditions. The current density, electrostatic potential, carrier charge density, and temperature distribution plots within the transistor structure illustrate the combined effect of the electrothermal interaction, base conductivity modulation, current crowding, base pushout, space charge layer widening, and current spreading phenomena in power transistors.
Keywords :
Boundary conditions; Current density; Doping profiles; Mathematical model; Partial differential equations; Power transistors; Predictive models; Semiconductor devices; Semiconductor process modeling; Steady-state;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1976.18346
Filename :
1478360
Link To Document :
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