• DocumentCode
    1052099
  • Title

    Hardware implementation of Montgomery´s modular multiplication algorithm

  • Author

    Eldridge, Stephen E. ; Walter, Colin D.

  • Author_Institution
    Comput. Dept., Univ. of Manchester Inst. of Sci. & Technol., Manchester, UK
  • Volume
    42
  • Issue
    6
  • fYear
    1993
  • fDate
    6/1/1993 12:00:00 AM
  • Firstpage
    693
  • Lastpage
    699
  • Abstract
    Hardware is described for implementing the fast modular multiplication algorithm developed by P.L. Montgomery (1985). Comparison with previous techniques shows that this algorithm is up to twice as fast as the best currently available and is more suitable for alternative architectures. The gain in speed arises from the faster clock that results from simpler combinational logic
  • Keywords
    digital arithmetic; multiplying circuits; Montgomery´s modular multiplication; fast modular multiplication; hardware implementation; Circuits; Clocks; Computer architecture; Cryptography; Digital arithmetic; Hardware; Helium; Logic; Public key; Security;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.277287
  • Filename
    277287
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1052099