DocumentCode
1052189
Title
Concurrent error detection on programmable systolic arrays
Author
Hughey, Richard
Author_Institution
Comput. Eng. Board of Studies, California Univ., Santa Cruz, CA, USA
Volume
42
Issue
6
fYear
1993
fDate
6/1/1993 12:00:00 AM
Firstpage
752
Lastpage
756
Abstract
Two concurrent error detection (CED) methods are presented. The methods, skewed replicated computation streams and interleaved replicated computation streams, are both well-suited for shared register and other systolic arrays. They allow software tradeoffs between time- and space-multiplexing with no special hardware. The methods can be automatically applied to any systolic program
Keywords
parallel programming; program diagnostics; systolic arrays; concurrent error detection; interleaved replicated computation streams; programmable systolic arrays; shared register; skewed replicated computation streams; software tradeoffs; Broadcasting; Computer architecture; Computer errors; Concurrent computing; Fault detection; Hardware; Mobile communication; Registers; Signal processing algorithms; Systolic arrays;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.277295
Filename
277295
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