DocumentCode
1052612
Title
A transistor design for high fT at low currents
Author
Greiff, Paul
Author_Institution
Charles Stark Draper Laboratory, Cambridge, MA
Volume
23
Issue
3
fYear
1976
fDate
3/1/1976 12:00:00 AM
Firstpage
343
Lastpage
347
Abstract
A design and processing technique allowing fabrication of devices with very small junction capacitances is presented. Emitter and base areas of the smallest device, called a microemitter, are reduced to about 3µ 2and 12µ 2, respectively, and a comparison is made with larger geometries fabricated on the same wafer. Ion implanted microemitter devices have fT = 4.8 GHz at currents as low as 100 µA and peak fT = 7.0 GHz and should allow a great improvement in the speed-power product of ECL circuits. Emitter injection appears to approach the behavior of a point source, and it is observed that the rate of fT falloff with current density is lower for the microemitter than for larger geometries. This effect may make these devices also useful as microwave transistors.
Keywords
Capacitance; Computational geometry; Current density; Fabrication; Frequency; High speed integrated circuits; Microwave devices; Microwave transistors; Power dissipation; Process design;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1976.18402
Filename
1478416
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