DocumentCode :
1053474
Title :
High-Speed and Low-Power Design Techniques for TCAM Macros
Author :
Wang, Chao-Ching ; Wang, Jinn-Shyan ; Yeh, Chingwei
Author_Institution :
Nat. Chung Cheng Univ., Chia-Yi
Volume :
43
Issue :
2
fYear :
2008
Firstpage :
530
Lastpage :
540
Abstract :
Ternary content addressable memory (TCAM) is an important component for many applications. For TCAM-based networking systems, the rapidly growing size of routing tables brings with it the challenge to design higher search speeds and lower power consumption. In this work, two techniques are proposed to realize high-performance and low-power TCAM for IP address lookup. One technique is the tree AND-type match-line scheme for high search speed. The other technique is the segmented search-line scheme for low power. The implemented 1.8 V 0.18 mum 256 times 128b TCAM macro achieves a 1.56 ns search time using a 1.42 fJ/bit/search of energy.
Keywords :
content-addressable storage; logic design; low-power electronics; table lookup; ternary codes; IP address lookup; TCAM macros; low-power design technique; size 0.18 mum; ternary content addressable memory; time 1.56 ns; voltage 1.8 V; Associative memory; Buffer storage; Chaos; Circuits; Clocks; Energy consumption; Pipeline processing; Routing; Search engines; Throughput; Associative memories; PF-CDPD; content-addressable memory; high speed; low power; pseudo-footless; segmented search line; tree match line;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2007.914330
Filename :
4444583
Link To Document :
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