Title :
Long term ionization response of several BiCMOS VLSIC technologies
Author :
Pease, Ronald L. ; Combs, William ; Clark, Steven
Author_Institution :
Mission Res. Corp., Albuquerque, NM, USA
fDate :
6/1/1992 12:00:00 AM
Abstract :
BiCMOS is emerging as a strong competitor to CMOS for gate arrays and memories because of its performance advantages for the same feature size. The authors examine the long-term ionization response of five BiCMOS technologies by characterizing test structures which emphasize the various failure modes of CMOS and bipolar. The primary failure modes are found to be associated with the recessed field oxide isolation: edge leakage in the n channel MOSFETs and buried layer to buried layer leakage in the bipolar. The ionization failure thresholds for worst case bias were in the range of 5-20 Krad(Si) for both failure modes in all five technologies. The gate oxides and NPN transistors were found to be relatively hard up to 1 Mrad(Si), which was the highest dose used in these tests
Keywords :
BIMOS integrated circuits; VLSI; failure analysis; integrated memory circuits; logic arrays; radiation effects; 5E3 to 1E6 rad; BiCMOS VLSIC technologies; NPN transistors; buried layer leakage; edge leakage; gate arrays; gate oxides; ionization failure thresholds; long-term ionization response; memories; recessed field oxide isolation; test structures; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Costs; Ionization; Isolation technology; MOSFETs; Space technology; Testing; Weapons;
Journal_Title :
Nuclear Science, IEEE Transactions on