EXMIN2: a simplification algorithm for exclusive-OR-sum-of-products expressions for multiple-valued-input two-valued-output functions

Author

Sasao, Tsutomu

Author_Institution

Dept. of Comput. Sci. & Electron. Eng., Kyushu Inst. of Technol., Iizuka, Japan

Volume

12

Issue

5

fYear

1993

fDate

5/1/1993 12:00:00 AM

Firstpage

621

Lastpage

632

Abstract

Minimization of AND-EXOR programmable logic arrays (PLAs) with input decoders corresponds to minimization of the number of products in Exclusive-OR sum-of-products expressions (ESOPs) for multiple-valued-input two-valued-output functions. A simplification algorithm for ESOPs that iteratively reduces the number of the products in ESOPs and then reduces the number of the literals is presented. Various rules are used to replace a pair of products with another one. Many AND-EXOR PLAs for arithmetic circuits have been simplified. In most cases, AND-EXOR PLAs required fewer products than AND-OR PLAs

Keywords

logic CAD; logic arrays; minimisation of switching nets; AND-EXOR PLAs; EXMIN2; arithmetic circuits; exclusive-OR-sum-of-products; input decoders; minimization; multiple-valued-input; programmable logic arrays; simplification algorithm; two-valued-output functions; Arithmetic; Automatic testing; Circuit testing; Computer science education; Hardware; Iterative algorithms; Iterative decoding; Minimization; Modems; Programmable logic arrays;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.277608

Filename

277608