VHSIC Hardware Description Language

In March 1980, the US Department of Defense (DoD) launched the Very High Speed Integrated Circuits program to advance the state of the art in highspeed integrated circuit technology, specifically for defense systems. In 1981 the Institute for Defense Analyses (IDA) arranged a workshop to define the requirements for such a standard. The DoD used the final report of the IDA workshop as a basis for defining a set of language requirements for the VHSIC Hardware Description Language (VHDL), issuing a request for proposal for a two-phase procurement of VHDL and its support environment. VHDL supports the design, documentation, and efficient simulation of hardware from the digital system level to the gate level. While designed to be independent of any underlying technology, design methodology, or environment tool, the language is also extendable toward various hardware technologies, design methodologies, and the varying information needs of design automation tools. The authors begin their discussion of VHDL by describing the concept of design entity, the language´s primary abstraction mechanism. They then present a time-based execution model and describe VHDL´s features, using a coded four-bit adder to illustrate the use of the most significant ones. Various figures are presented that contain the block diagrams and the code for this example.