DocumentCode :
1054801
Title :
Accelerated dynamic learning for test pattern generation in combinational circuits
Author :
Kunz, Wolfgang ; Pradhan, Dhiraj K.
Author_Institution :
Potsdam Univ., NY, USA
Volume :
12
Issue :
5
fYear :
1993
fDate :
5/1/1993 12:00:00 AM
Firstpage :
684
Lastpage :
694
Abstract :
An efficient technique for dynamic learning called oriented dynamic learning is proposed. Instead of learning being performed for almost all signals in the circuit, it is shown that it is possible to determine a subset of these signals to which all learning operations can be restricted. It is further shown that learning for this set of signals provides the same knowledge about the nonsolution areas in the decision trees as the dynamic learning of SOCRATES. High efficiency is achieved by limiting learning to certain learning lines that lie within a certain area of the circuit, called the active area. Experimental results are presented to show that oriented dynamic learning is far more efficient than dynamic learning in SOCRATES
Keywords :
automatic testing; combinatorial circuits; learning systems; logic testing; accelerated learning; combinational circuits; oriented dynamic learning; test pattern generation; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Combinational circuits; DH-HEMTs; Decision trees; Life estimation; Signal generators; Test pattern generators;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.277613
Filename :
277613
Link To Document :
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