Supply current spectrum estimation of digital cores at early design

A new, approximate method is presented to calculate a digital core supply current spectrum. The method is based on characterisation of supply current pulses in terms of the rise and fall times and pulse width. The upper limits (an envelope) for the supply current spectrum are derived using logic signal transition densities at digital core internal nodes. Contrary to the known methods, the proposed one uses limited data and generates much needed supply current information strongly desired by a system designer at a very early system planning. By using the probabilistic and statistical techniques the method is only weakly dependent on input sequence pattern and gives reliable final results.