Performances of the Delay-Line Multiplier Circuit for Clock and Carrier Synchronization in Digital Satellite Communications

This paper is concerned with clock and carrier synchronization in digital satellite transmissions, using the delay-line multiplier circuit. For clock recovery from baseband signal, with random data, a closed form formula is derived which gives the spectrum after multiplication, for any arbitrary pulse shape. This spectrum contains spectral lines at the clock frequency and its harmonics, and a continuous part which is the pattern noise. This pattern noise may be decomposed in noise in phase with the recovered clock, and noise in quadrature whose power spectral density is always zero at zero frequency. The effect of Gaussian noise on the channel is taken into account to calculate signal-to-noise ratio at the clock frequency as a function of the classical parameter . With a modulated input carrier, the signal at the output of the delay-line multiplier may be separated into two parts: a low frequency signal that contains clock information and a bandpass spectrum signal around twice the carrier frequency that contains carrier information, when possible. Spectrum and signal-to-noise ratio in carrier recovery are studied for BPSK and offset quadrature modulation.