Title :
A 6-bit 800-MS/s Pipelined A/D Converter With Open-Loop Amplifiers
Author :
Shen, Ding-Lan ; Lee, Tai-Cheng
Author_Institution :
Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
Abstract :
A 6-bit 800-MS/s pipelined A/D converter (ADC) achieves SNDR and SFDR of 33.7 dB and 47.5 dB, respectively. Employing voltage-mode open-loop amplifiers in gain stages, global gain control techniques, and two-bank-interleaved architecture, the proposed pipelined A/D converter relaxes stringent design tradeoffs between speed and power. Fabricated in a 0.18-mum CMOS technology, the ADC consumes 105 mW from a 1.8-V power supply while the active area is only 0.5 mm2
Keywords :
CMOS analogue integrated circuits; amplifiers; analogue-digital conversion; 0.18 micron; 1.8 V; 105 mW; 6 bit; CMOS analog integrated circuits; global gain control; pipelined analog-to-digital converter; two-bank-interleaved architecture; voltage-mode open-loop amplifiers; Broadband amplifiers; CMOS analog integrated circuits; CMOS technology; Calibration; Energy consumption; Gain control; Integrated circuit technology; Power amplifiers; Power supplies; Voltage; Analog-digital conversion; CMOS analog integrated circuits; gain control;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2006.889380
