DocumentCode :
1056278
Title :
A Precision CMOS Amplifier Using Floating-Gate Transistors for Offset Cancellation
Author :
Srinivasan, Venkatesh ; Serrano, Guillermo J. ; Gray, Jordan ; Hasler, Paul
Author_Institution :
Texas Instruments Inc., Dallas, TX
Volume :
42
Issue :
2
fYear :
2007
Firstpage :
280
Lastpage :
291
Abstract :
A long-term offset cancellation scheme that enables continuous-time amplifier operation is described. Offset cancellation is achieved by programming floating-gate transistors that form an integral part of the amplifier´s architecture. The offset voltage of a single-stage folded cascode amplifier has been programmed to a minimum of plusmn25 muV in a 0.5 mum digital CMOS process. The long-term offset voltage drift has been calculated to be less than 0.5 muV over a period of 10 years at 55degC from a thermionic emission model for floating-gate charge loss. The offset voltage varies by a maximum of 130 muV over a temperature range of 170degC, thereby making this a viable approach to offset cancellation
Keywords :
CMOS digital integrated circuits; amplifiers; continuous time filters; thermionic emission; 0.5 micron; 10 yrs; 170 C; 55 C; CMOS amplifier; charge retention; continuous-time amplifier operation; digital CMOS process; floating-gate charge loss; floating-gate drift; floating-gate transistors; offset cancellation; offset voltage; single-stage folded cascode amplifier; thermionic emission model; CMOS process; Choppers; Circuits; MOSFETs; Operational amplifiers; Sampling methods; Semiconductor device modeling; Temperature distribution; Thermionic emission; Voltage; Charge retention; floating-gate drift; floating-gate transistors; input offset voltage; offset cancellation;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2006.889365
Filename :
4077175
Link To Document :
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