• DocumentCode
    1058152
  • Title

    A switched capacitor circuit simulator: AWEswit

  • Author

    Trihy, Richard J. ; Rohrer, Ronald A.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
  • Volume
    29
  • Issue
    3
  • fYear
    1994
  • fDate
    3/1/1994 12:00:00 AM
  • Firstpage
    217
  • Lastpage
    225
  • Abstract
    This paper describes the modeling and simulation of switched capacitor circuits in AWEswit. AWEswit is a mixed signal simulator for switched capacitor circuits. It allows for portions of the circuit to be modeled with digital blocks controlled by an event queue. The remainder of the circuit is modeled in the analog domain. The paper describes the circuit formulations employed by AWEswit, and how they are exploited in modeling the nonidealities associated with switched capacitor circuits. AWEswit employs asymptotic waveform evaluation (AWE) as its core simulation engine. It combines circuit formulations in the charge-voltage and current-voltage regimes. This flexibility in the circuit formulations means that if the circuit is modeled entirely with ideal switches (i.e. no resistors), then it is automatically solved in the charge-voltage regime (like SWITCAP2). However, if portions of the circuit need to be solved in the current-voltage regime, then AWEswit automatically partitions the circuit and solves the different partitions in whichever regime is appropriate, i.e., in the current-voltage regime (using AWE to evaluate circuit response) or in the charge-voltage regime. AWEswit naturally handles the bandwidth limitations associated with switched capacitor circuits. In addition, it models the clock feedthrough and signal-dependent charge dump that characterize MOSFET switches. The simulator is illustrated by example
  • Keywords
    circuit analysis computing; monolithic integrated circuits; semiconductor switches; switched capacitor networks; AWEswit; MOSFET switches; asymptotic waveform evaluation; automatic partitioning; bandwidth limitations; charge-voltage regime; clock feedthrough; current-voltage regime; event queue; mixed signal simulator; modeling; nonidealities; signal-dependent charge dump; switched capacitor circuit simulator; Bandwidth; Circuit simulation; Clocks; Digital control; Engines; Flexible printed circuits; Resistors; Switched capacitor circuits; Switches; Switching circuits;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.278343
  • Filename
    278343