A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm

Author

Zimmermann, R. ; Curiger, A. ; Bonnenberg, H. ; Kaeslin, H. ; Felber, N. ; Fichtner, W.

Author_Institution

Integrated Syst. Lab., Swiss Federal Inst. of Technol., Zurich, Switzerland

Volume

29

Issue

3

fYear

1994

fDate

3/1/1994 12:00:00 AM

Firstpage

303

Lastpage

307

Abstract

A VLSI implementation of the International Data Encryption Algorithm is presented. Security considerations led to novel system concepts in chip design including protection of sensitive information and on-line failure detection capabilities. BIST was instrumental for reconciling contradicting requirements of VLSI testability and cryptographic security. The VLSI chip implements data encryption and decryption in a single hardware unit. All important standardized modes of operation of block ciphers, such as ECB, CBC, CFB, OFB, and MAC, are supported. In addition, new modes are proposed and implemented to fully exploit the algorithm´s inherent parallelism. With a system clock frequency of 25 MHz the device permits a data conversion rate of more than 177 Mb/s. Therefore, the chip can be applied to on-line encryption in high-speed networking protocols like ATM or FDDI

Keywords

CMOS integrated circuits; VLSI; built-in self test; cryptography; data conversion; digital signal processing chips; integrated circuit testing; parallel algorithms; pipeline processing; 177 Mbit/s; 25 MHz; ATM; BIST; CBC; CFB; ECB; FDDI; IDEA; International Data Encryption Algorithm; MAC; OFB; VINCI; VLSI implementation; VLSI testability; block ciphers; chip design; cryptographic security; data conversion; decryption; high-speed networking protocols; online failure detection capabilities; parallel algorithm; sensitive information; Built-in self-test; Chip scale packaging; Cryptography; Data security; Hardware; Information security; Instruments; Protection; Testing; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.278352

Filename

278352