• DocumentCode
    1058483
  • Title

    An Efficient 4-D 8PSK TCM Decoder Architecture

  • Author

    He, Jinjin ; Wang, Zhongfeng ; Liu, Huping

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
  • Volume
    18
  • Issue
    5
  • fYear
    2010
  • fDate
    5/1/2010 12:00:00 AM
  • Firstpage
    808
  • Lastpage
    817
  • Abstract
    This paper presents an efficient architecture for a 4-D eight-phase-shift-keying trellis-coded-modulation (TCM) decoder. First, a low-complexity architecture for the transition metric unit is proposed based on substructure sharing. This scheme significantly reduces the required computation without degrading the performance. Then, a new hybrid T -algorithm for a Viterbi decoder is developed by applying a T-algorithm on both branch metrics (BMs) and path metrics (PMs). TCM encoders usually employ high-rate convolutional codes that yield many more transition paths per state than low-rate codes do. This makes it feasible to purge unnecessary additions by applying the T -algorithm on BMs. Applying the T-algorithm on BMs instead of PMs allows one to move the ??search-for-the-optimal?? operation out of the add-compare-select-unit (ACSU) loop. Hence, the clock speed will not be affected. In addition, by combining the T-algorithm on BMs and the T-algorithm on PMs, the hybrid T -algorithm can reduce the computations required with the conventional T-algorithm on PMs by as much as 50%.
  • Keywords
    Viterbi decoding; codecs; convolutional codes; logic design; phase shift keying; trellis coded modulation; 4D 8PSK TCM decoder architecture; 4D eight-phase-shift-keying trellis-coded-modulation decoder; TCM encoders; Viterbi decoder; add-compare-select-unit loop; branch metrics; clock speed; high-rate convolutional codes; hybrid T-algorithm; low-complexity architecture; path metrics; search-for-the-optimal operation; substructure sharing; transition metric unit; transition paths; $T$ -algorithm; Add–compare–select unit (ACSU); VLSI; Viterbi decoder (VD); trellis-coded modulation (TCM);
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2009.2015325
  • Filename
    5067008