• DocumentCode
    1058576
  • Title

    A High Performance LSI Digital Signal Processor for Communication

  • Author

    Mochida, Yukou ; Murano, Kazuo ; Tsuda, Toshitaka ; Gambe, Hirohisa ; Fujii, Shigeru

  • Author_Institution
    Fujitsu Lab. Ltd., Japan
  • Volume
    3
  • Issue
    2
  • fYear
    1985
  • fDate
    3/1/1985 12:00:00 AM
  • Firstpage
    347
  • Lastpage
    356
  • Abstract
    This paper describes a newly developed CMOS LSI DSP (FDSP3). It has a powerful multiplier, which operates at a rate of 10 M-operations/s, almost twice as fast as the fastest existing LSI DSP´s. Some key techniques to attain these high performance characteristics of the DSP are described. Suitable memory capacities of the RAM and ROM were analyzed as a function of the operational capability of the DSP. These were reflected in the design of the FDSP3. To assist in the development of the program, support tools have been developed. A Pascal based cross compiler and an on-line debugging tool are described in some detail.
  • Keywords
    CMOS integrated circuits; Signal processing; CMOS technology; Data handling; Digital signal processing; Digital signal processors; Hardware; Laboratories; Large scale integration; Read only memory; Read-write memory; Throughput;
  • fLanguage
    English
  • Journal_Title
    Selected Areas in Communications, IEEE Journal on
  • Publisher
    ieee
  • ISSN
    0733-8716
  • Type

    jour

  • DOI
    10.1109/JSAC.1985.1146209
  • Filename
    1146209