Title :
Influence of avalanche buildup time in TRAPATT diodes
Author :
Chaturvedi, P.K. ; Khokle, W.S. ; Sisodia, M.L.
Author_Institution :
Vigyan Bhavan, Annexe, New Delhi, India
fDate :
12/1/1977 12:00:00 AM
Abstract :
Device equations for TRAPATT operation have been solved in a closed loop for optimization over the punch-through factor. Design triangles for various frequencies show design space for TRAPATT operation with optimized design near the apex of the triangles, and illustrate why it will be difficult to operate TRAPATT diodes at 20 GHz or higher.
Keywords :
Design optimization; Diodes; Frequency; Ionization; Plasma properties; Plasma temperature; Power generation; Steady-state; Thermal conductivity; Voltage control;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1977.19014
