DocumentCode
1058850
Title
Influence of avalanche buildup time in TRAPATT diodes
Author
Chaturvedi, P.K. ; Khokle, W.S. ; Sisodia, M.L.
Author_Institution
Vigyan Bhavan, Annexe, New Delhi, India
Volume
24
Issue
12
fYear
1977
fDate
12/1/1977 12:00:00 AM
Firstpage
1360
Lastpage
1362
Abstract
Device equations for TRAPATT operation have been solved in a closed loop for optimization over the punch-through factor. Design triangles for various frequencies show design space for TRAPATT operation with optimized design near the apex of the triangles, and illustrate why it will be difficult to operate TRAPATT diodes at 20 GHz or higher.
Keywords
Design optimization; Diodes; Frequency; Ionization; Plasma properties; Plasma temperature; Power generation; Steady-state; Thermal conductivity; Voltage control;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1977.19014
Filename
1479206
Link To Document