• DocumentCode
    1060301
  • Title

    Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method

  • Author

    Cheung, Ray C C ; Lee, Dong-U ; Luk, Wayne ; Villasenor, John D.

  • Author_Institution
    Imperial Coll. London, London
  • Volume
    15
  • Issue
    8
  • fYear
    2007
  • Firstpage
    952
  • Lastpage
    962
  • Abstract
    We present an automated methodology for producing hardware-based random number generator (RNG) designs for arbitrary distributions using the inverse cumulative distribution function (ICDF). The ICDF is evaluated via piecewise polynomial approximation with a hierarchical segmentation scheme that involves uniform segments and segments with size varying by powers of two which can adapt to local function nonlinearities. Analytical error analysis is used to guarantee accuracy to one unit in the last place (ulp). Compact and efficient RNGs that can reach arbitrary multiples of the standard deviation sigma can be generated. For instance, a Gaussian RNG based on our approach for a Xilinx Virtex-4 XC4VLX100-12 field-programmable gate array produces 16-bit random samples up to 8.2 sigma. It occupies 487 slices, 2 block-RAMs, and 2 DSP-blocks. The design is capable of running at 371 MHz and generates one sample every clock cycle.
  • Keywords
    error analysis; field programmable gate arrays; piecewise polynomial techniques; random number generation; Chebyshev approximation; Xilinx Virtex-4 FPGA; analytical error analysis; arbitrary random number distributions; automatic synthesis; computer arithmetic; elementary function approximation; field-programmable gate array; hardware generation; hierarchical segmentation scheme; inverse cumulative distribution function; inversion method; piecewise polynomial approximation; random number generator; uniform distributions; unit in the last place; Application software; Chebyshev approximation; Clocks; Distribution functions; Error analysis; Field programmable gate arrays; Function approximation; Hardware; Polynomials; Random number generation; Algorithms implemented in hardware; Chebyshev approximation and theory; automatic synthesis; computer arithmetic; elementary function approximation; error analysis; gate arrays; piecewise polynomial approximation;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2007.900748
  • Filename
    4276772