Title :
Guest Editorial System-Level Interconnect Prediction
Author :
Dambre, Joni ; Hutton, M.
Keywords :
Costs; Delay; Electronic design automation and methodology; Energy consumption; Field programmable gate arrays; Integrated circuit interconnections; Network-on-a-chip; Power system interconnection; Predictive models; Throughput;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2007.900756
