DocumentCode :
1060502
Title :
Investigation of Anomalous Inversion CV Characteristics for Long-Channel MOSFETs With Leaky Dielectrics: Mechanisms and Reconstruction
Author :
Lee, Wei ; Su, Pin ; Su, Ke-Wei ; Chiang, Chung-Shi ; Liu, Sally
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu
Volume :
21
Issue :
1
fYear :
2008
Firstpage :
104
Lastpage :
109
Abstract :
This paper investigates anomalous inversion capacitance-voltage (C-V) attenuation for MOSFETs with leaky dielectrics. We propose to reconstruct the inversion C-V characteristic based on long-channel MOSFETs using the concept of intrinsic input resistance (Rii). The concept of Rii has been validated by segmented BSIM4/SPICE simulation. Our reconstructed C-V characteristics show poly-depletion effects, which are not visible in the two-frequency three-element method and agree well with the North Carolina State University-CVC simulation results. The intrinsic input resistance dominates the overall gate-current-induced debiasing effect (~95% for L = 20 mum) and can be extracted directly from the I-V characteristics. Due to its simplicity, our proposed Rii approach may provide an option for regular process monitoring purposes.
Keywords :
MOSFET; SPICE; capacitance measurement; voltage measurement; BSIM4 simulation; SPICE simulation; anomalous inversion capacitance-voltage attenuation; gate-current-induced debiasing effect; intrinsic input resistance; leaky dielectrics; long-channel MOSFET; CMOS technology; Capacitance; Dielectrics; Distortion measurement; Electrical resistance measurement; Frequency; MOSFETs; Monitoring; SPICE; Tunneling; Capacitance–voltage (CV); MOSFET; intrinsic input resistance; metal–oxide–emiconductor (MOS) capacitance; ultrathin gate oxide;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2007.914374
Filename :
4447306
Link To Document :
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