Title :
C-MOS/SOS gate-protection networks
Author :
Pancholy, Ranjeet K. ; Oki, T.J.
Author_Institution :
Electronics Research Center, Rockwell International, Anaheim, CA
fDate :
8/1/1978 12:00:00 AM
Abstract :
To protect C-MOS/SOS LSI circuits from electrostatic discharge and resulting dielectric breakdown of the gate insulator, various gate-protection networks are employed. This paper reports on the evaluation of high-voltage diodes, Zener diodes, distributed diode-resistor combinations, and spark-gap devices for use in gate protection network applications. Results of pulse-power burnout, current-voltage (dc) characterization, bias-temperature stress, and radiation effects on individual test devices are analyzed to provide guidelines for protection, circuit selection, and design.
Keywords :
Circuit testing; Dielectric breakdown; Dielectrics and electrical insulation; Diodes; Electrostatic discharge; Large scale integration; Protection; Pulse circuits; Spark gaps; Stress;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1978.19202
