DocumentCode
1060843
Title
C-MOS/SOS LSI input/Output protection networks
Author
Ahlport, Boyce T. ; Cricchi, J. Ronald ; Barth, Douglas A.
Author_Institution
Northrop Corporation, Electronics Division, Hawthorne, CA
Volume
25
Issue
8
fYear
1978
fDate
8/1/1978 12:00:00 AM
Firstpage
933
Lastpage
938
Abstract
An improved input and output electrical surge protection has been developed for C-MOS and MNOS large-scale integrated circuitry fabricated on sapphire. The failure mode was designed to be the input- or output-series limiting diffused resistor, which can be controlled reliably through the fabrication processes. Forward-bias diodes attenuate the overvoltage surges. Failure energies and voltages have been evaluated, and design equations are developed and verified.
Keywords
Circuit testing; Conductivity; EMP radiation effects; Impedance; Large scale integration; Resistors; Silicon; Surge protection; Surges; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1978.19204
Filename
1479598
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