DocumentCode
1061008
Title
The Use of Condition Maps in the Design and Testing of Power Electronic Circuits and Devices
Author
Bryant, Angus T. ; Parker-Allotey, Nii-Adotei ; Palmer, Patrick R.
Author_Institution
Warwick Univ., Coventry
Volume
43
Issue
4
fYear
2007
Firstpage
902
Lastpage
910
Abstract
This paper presents a new technique for analyzing the conditions to which power semiconductor devices are subjected within practical inverters. A representative load cycle, which defines the inverter conditions, is used to estimate the switching conditions of the devices. Condition maps are generated, which allows the design and testing of the system to consider the more likely range of conditions. Estimates of temperature profiles can also be made to further improve the realism of such design. This promises to lead to the development of more realistic optimization procedures.
Keywords
invertors; power semiconductor devices; switching; condition maps; inverters; load cycle; power electronic circuits; power semiconductor devices; switching conditions; Circuit testing; Electronic equipment testing; Inverters; Power electronics; Power semiconductor devices; Power semiconductor switches; Semiconductor device testing; Switching circuits; System testing; Voltage; Conditions; device testing; load cycles; optimization; power semiconductor devices;
fLanguage
English
Journal_Title
Industry Applications, IEEE Transactions on
Publisher
ieee
ISSN
0093-9994
Type
jour
DOI
10.1109/TIA.2007.900470
Filename
4276841
Link To Document