DocumentCode
1061266
Title
An ISDN Network
-Channel VLSI Architecture
Author
Kun, Randy
Author_Institution
Bell Northern Research, Ottowa, Ont., Canada
Volume
4
Issue
8
fYear
1986
fDate
11/1/1986 12:00:00 AM
Firstpage
1275
Lastpage
1280
Abstract
channel processing in an ISDN exchange termination is very expensive using commercially available serial communications devices. This is because semiconductor manufacturers understand ISDN from the perspective of a terminal which is different from that of a network: the former sees one
channel, whereas the latter must deal with many. Consequently, commercially available devices are designed to support a small number of channels, whereas exchange terminations must cost-effectively support a large number of channels. This paper describes an innovative VLSI architecture that uses multiplexing to allow many channels to share serial communications circuitry as well as external message buffering. This capability will greatly reduce the hardware cost and complexity of
channel processing in ISDN exchange terminations.Keywords
Integrated services digital networks; Access protocols; Costs; Cyclic redundancy check; Data processing; Data structures; ISDN; Performance analysis; Telemetry; Topology; Very large scale integration;
fLanguage
English
Journal_Title
Selected Areas in Communications, IEEE Journal on
Publisher
ieee
ISSN
0733-8716
Type
jour
DOI
10.1109/JSAC.1986.1146472
Filename
1146472
Link To Document